A Null DTE Fifo buffer for multi-segment communications circuits

Technical Report · Wed Jun 01 04:00:00 EDT 1988

OSTI ID:7158890

George, M

The Null DTE Fifo was designed to buffer data between two modem pair links in a multi-segment communications circuit. Data buffering assures that valid data are being clocked into the local modems of both links. Without this active data buffer, constant phase errors between the two local modems' clocks may cause data errors, and thus, unacceptable circuit throughput. During the course of communication circuit design, a set of communications symbols was developed to aid in the process. These symbols not only simplify circuit design, but provide a standard set to minimize interpretation problems among the circuit designers. The symbol set can be used to represent various devices in a circuit, such as modems, computers, terminals, encryption devices, converters, etc. In addition, the propagation of clock, data, and control signals through the circuit can be represented. Clocking modes on synchronous components (modems, multiplexers, etc.) and signal line crossovers can be determined from the drawings during the design process. This set of symbols, along with the rules of their use, comprise a very efficient design tool.

• Research Organization: Sandia National Labs., Albuquerque, NM (USA)
• DOE Contract Number: AC04-76DP00789
• OSTI ID: 7158890
• Report Number(s): SAND-88-0175; ON: DE88012411
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420800* -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990220 -- Computers
Computerized Models
& Computer Programs-- (1987-1989)
BUFFERS
COMMUNICATIONS
COMPUTER ARCHITECTURE
COMPUTER NETWORKS
COMPUTERIZED CONTROL SYSTEMS
CONTROL SYSTEMS
DATA-FLOW PROCESSING
DESIGN
ELECTRONIC CIRCUITS
INTERFACES
PROGRAMMING
SIGNAL CONDITIONING