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U.S. Department of Energy
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VLSI complexity of sorting

Technical Report ·
OSTI ID:7091440

The area-time complexity of sorting is analyzed under an updated model of VLSI computation. The new model distinguishes between processing and memory circuits. Other adjustments to the model allow a comparison between pipelined and non-pipelined designs. Thirteen different designs for VLSI sorters are described and their sorting circuits are used to document the existence of an area-time tradeoff for the sorting problem. The area-time performance figure for all but three of the designs is close to the theoretical minimum value.

Research Organization:
California Univ., Berkeley (USA). Electronics Research Lab.
OSTI ID:
7091440
Report Number(s):
PB-83-112847
Country of Publication:
United States
Language:
English

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