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U.S. Department of Energy
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Macromodeling approach for simulation of VLSI circuits

Thesis/Dissertation ·
OSTI ID:7065429

With the increasing size and complexity of VLSI digital circuits, simulation tools have become indispensable in the verification that designs meet their specifications. The sheer size of these designs, however, makes it impossible to use traditional detailed simulation techniques, exemplified by circuit simulators like SPICE. On the other hand, techniques such as logic simulation can efficiently simulate these large designs, and can also effectively exploit their structured repetitive nature, whereby the design consists of a number of repeated cells such as logic gates and storage elements. The discretization of continuous analog waveforms to 0 and 1 levels, with the attendant loss of detail, limit the usefulness of such techniques. This research investigates new approaches for modeling the individual cells that form the basic components of VLSI circuits. In particular, starting from the circuit-level representation of the cell as an interconnection of devices, a mixed digital/analog model is abstracted which models the inputs and outputs of the cell as analog waveforms, but which also makes use of the digital properties and functionality of such cells. It is shown how such models may be generated, and suitable simulation algorithms are developed. The models and algorithms were implemented in a simulator called wasim.

Research Organization:
Carnegie-Mellon Univ., Pittsburgh, PA (USA)
OSTI ID:
7065429
Country of Publication:
United States
Language:
English