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ENABLE -- A systolic 2nd level trigger processor for track finding and e/[pi] discrimination for ATLAS/LHC

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
OSTI ID:6974041
; ;  [1];  [2]
  1. Univ. Mannheim (Germany). Lehrstuhl fuer Informatik V
  2. Univ. Heidelberg (Germany). Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
The Enable Machine is a systolic 2nd level trigger processor for the transition radiation detector (TRD) of ATLAS/LHC. It is developed within the EAST/RD-11 collaboration at CERN. The task of the processor is to find electron tracks and to reject pion tracks according to the EAST benchmark algorithm in less than 10[mu]s. Track are identified by template matching in a ([psi],z) region of interest (RoI) selected by a 1st level trigger. In the ([psi],z) plane tracks of constant curvature are straight lines. The relevant lines form mask templates. Track identification is done by histogramming the coincidences of the templates and the RoI data for each possible track. The Enable Machine is an array processor that handles tracks of the same slope in parallel, and tracks of different slope in a pipeline. It is composed of two units, the Enable histogrammer unit and the Enable z/[psi]-board. The interface daughter board is equipped with a HIPPI-interface developed at JINR/-Dubna, and Xilinx 'corner turning' data converter chips. Enable uses programmable gate arrays (XILINX) for histogramming and synchronous SRAMs for pattern storage. With a clock rate of 40 MHz the trigger decision time is 6.5 [mu]s and the latency 7.0 [mu]s. The Enable machine is scalable in the RoI size as well as in the number of tracks processed. It can be adapted to different recognition tasks and detector setups. The prototype of the Enable Machine has been tested in a beam time of the RD6 collaboration at CERN in October 1993.
OSTI ID:
6974041
Report Number(s):
CONF-931051--
Conference Information:
Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Journal Volume: 41:4Pt1
Country of Publication:
United States
Language:
English