A survey of microprocessor architectures for memory management

Journal Article · Sun Mar 01 04:00:00 EST 1987 · Computer; (United States)

DOI:https://doi.org/10.1109/MC.1987.1663508· OSTI ID:6917932

Furht, B; Milutinovic, V

This article presents an overview of current 16- and 32-bit microprocessor architectures that support memory management. The authors define the basic requirements for a processor to support memory management and introduce hierarchically organized memory. They describe several address translation schemes, such as paging, segmentation, and combined paging/segmentation and discuss their implementation in current microprocessors. They give special emphasis to the application of associative cache memory, and analyze and compare single-level and multi-level address mapping schemes. Futhermore, the article discusses the capabilities of current microprocessors to support virtual memory, which includes abilities to recognize an address fault, to abort the execution of the current instruction and save necessary information, and to restore the saved state and resume normal processing. The authors evaluate two methods to restart the interrupted instruction, instruction restart and instruction continuation, and discuss their implementation in current microprocessors. They also discuss protection and security issues, and evaluate two protection schemes, hierarchical and nonhierarchical.

• Research Organization: Univ. of Miami
• OSTI ID: 6917932
• Journal Information: Computer; (United States), Journal Name: Computer; (United States) Vol. 20:3; ISSN CPTRB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990220* -- Computers
Computerized Models
& Computer Programs-- (1987-1989)
ARRAY PROCESSORS
COMPARATIVE EVALUATIONS
COMPUTER ARCHITECTURE
COMPUTER CODES
COMPUTERS
DATA PROCESSING
DIGITAL COMPUTERS
DOCUMENT TYPES
ELECTRONIC CIRCUITS
FAULT TOLERANT COMPUTERS
MAPPING
MEMORY DEVICES
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
PERFORMANCE
PROCESSING
REVIEWS
SECURITY
TRANSLATORS