An efficient communication scheme for solving S[sub n] equations on message-passing multiprocessors
- Oak Ridge National Laboratory, TN (United States)
Early models of Intel's hypercube multiprocessors, e.g., the iPSC/1 and iPSC/2, were characterized by the high latency of message passing. This relatively weak dependence of the communication penalty on the size of messages, in contrast to its strong dependence on the number of messages, justified using the Fan-in Fan-out algorithm (which implements a minimum spanning tree path) to perform global operations, such as global sums, etc. Recent models of message-passing computers, such as the iPSC/860 and the Paragon, have been found to possess much smaller latency, thus forcing a reexamination of the issue of performance optimization with respect to communication schemes. Essentially, the Fan-in Fan-out scheme minimizes the number of nonsimultaneous messages sent but not the volume of data traffic across the network. Furthermore, if a global operation is performed in conjunction with the message passing, a large fraction of the attached nodes remains idle as the number of utilized processors is halved in each step of the process. On the other hand, the Recursive Halving scheme offers the smallest communication cost for global operations but has some drawbacks.
- OSTI ID:
- 6904470
- Report Number(s):
- CONF-931160-; CODEN: TANSAO
- Journal Information:
- Transactions of the American Nuclear Society; (United States), Vol. 69; Conference: American Nuclear Society (ANS) winter meeting, San Francisco, CA (United States), 14-18 Nov 1993; ISSN 0003-018X
- Country of Publication:
- United States
- Language:
- English
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99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ARRAY PROCESSORS
OPERATION
PERFORMANCE
HYPERCUBE COMPUTERS
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OPTIMIZATION
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NEUTRAL-PARTICLE TRANSPORT
RADIATION TRANSPORT
663610* - Neutron Physics- (1992-)
990200 - Mathematics & Computers