Optimal VLSI dictionary machines without compress instructions

Journal Article · Tue May 01 04:00:00 EDT 1990 · IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA)

DOI:https://doi.org/10.1109/12.53580· OSTI ID:6860383

Li, H F; Probst, D K ^[1]

---

1. Dept. of Computer Science, Concordia Univ., Montreal (CA)

The authors present several designs for VLSI dictionary machines that combine both a linear (modify) network and a logarithmic (query) network with a novel idea for separation of concerns. The authors' initial design objectives included: single-cycle operability of host-issued modify and query commands (no compress instructions), complete processor utilization (no wasted processors), and optimal 2 log {ital n} response times, where {ital n} is the current population of the machine. The authors sought simple ideas that, for the first time, would allow all three objectives to be achieved simultaneously.

• OSTI ID: 6860383
• Journal Information: IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA), Journal Name: IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA) Vol. 39:5; ISSN ITCOB; ISSN 0018-9340
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
ARRAY PROCESSORS
COMPUTER NETWORKS
DESIGN
DICTIONARIES
DOCUMENT TYPES
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
OPTIMIZATION
PARALLEL PROCESSING
PROGRAMMING