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An associative memory circuit may let designers expand neural networks around a matrix of analog synapses

Journal Article · · IEEE (Institute of Electrical and Electronics Engineers) Micro; (USA)
OSTI ID:6860013
; ;  [1];  [2]
  1. National Polytechnic Inst., Grenoble (FR)
  2. Dorr-Oliver, Inc., Stamford, CT (USA)

Today, many university and company researchers interested in neural networks look for new algorithms and real applications. They realize that classical computers are not well adapted to provide the very large computational capabilities and high communication bandwidth that simulations of large networks imply. So, since 1986 researchers have become greatly interested in designing both neurocomputers and very large scale integration neural networks. Neurocomputers must be seen as computers with both hardware and software general-purpose tools for emulating neural networks. VLSI neural networks, because of current integrated-circuit technology, remain restricted to one class of networks and devoted to a specific application.

OSTI ID:
6860013
Journal Information:
IEEE (Institute of Electrical and Electronics Engineers) Micro; (USA), Journal Name: IEEE (Institute of Electrical and Electronics Engineers) Micro; (USA) Vol. 9:6; ISSN IEMID; ISSN 0272-1732
Country of Publication:
United States
Language:
English