S-1 Mark IIA supercomputer
Conference
·
OSTI ID:6809221
This paper describes the S-1 Mark IIA Multiprocessor System. It is composed of up to 16 supercomputer class uniprocessors with multiple local caches, an extremely large, medium-latency high-bandwidth shared memory, and a low-latency synchronization mechanism for passing short messages. The system is applicable to a wide variety of applications, including large-scale physical simulation, real-time command and control and program development in a time-sharing environment. The hardware organization, its implications, and software supporting the efficient utilization of the multiprocessor are discussed.
- Research Organization:
- Lawrence Livermore National Lab., CA (USA)
- DOE Contract Number:
- W-7405-ENG-48
- OSTI ID:
- 6809221
- Report Number(s):
- UCRL-89165; CONF-830685-2; ON: DE84012374
- Country of Publication:
- United States
- Language:
- English
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