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Title: Implementation of a 66 MHz analog memory as a front end for LHC detectors

Conference · · AIP Conference Proceedings (American Institute of Physics); (United States)
OSTI ID:6711000
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  1. Cavendish Laboratory, University of Cambridge, Cambridge CB3 OHE (United Kingdom)
  2. CERN, CH-1211 Geneva 23 (Switzerland)
  3. Institut fuer Physik, Universitaet Dortmund, D-4600 Dortmund (Germany)
  4. DPNC, Geneva University, CH-1211, Geneva 4 (Switzerland)
  5. School of Physics, University of Melbourne, Parkville, Victoria 3052 (Australia)
  6. Department of Nuclear Physics, Oxford University, Oxford (United Kingdom)
  7. Rutherford Appleton Laboratory, Chilton, Didcot, Oxon OX11 0QX (United Kingdom)
  8. Centre d'Etudes Nucleaires de Saclay, F-91191 Gif-sur-Yvette (France)

We describe the front end signal processing chip (HARP) being developed by the RD2 collaboration for LHC detectors. The HARP chip, based around an analog memory, will provide data storage at LHC rates for 2 [mu]sec and allow stored data to be accessed for trigger rates of up to 50--100 KHz. We have tested two different prototypes of the final chip as front end for silicon detectors, using a Sr90 source and high energy pions and electrons from the CERN-SPS test beam.

OSTI ID:
6711000
Report Number(s):
CONF-920837-; CODEN: APCPCS
Journal Information:
AIP Conference Proceedings (American Institute of Physics); (United States), Vol. 272:2; Conference: ICHEP-26: 26th International Union of Pure and Applied Physics (IUPAP) conference on high energy physics, Dallas, TX (United States), 6-12 Aug 1992; ISSN 0094-243X
Country of Publication:
United States
Language:
English