A longitudinal multi-bunch feedback system using parallel digital signal processors
- Stanford Linear Accelerator Center, Stanford, California 94309 (United States)
- INFN Laboratori Nazionali, Frascati (Italy)
A programmable longitudinal feedback system based on four AT T 1610 digital signal processors has been developed as a component of the PEP-II R D program. This longitudinal quick prototype is a proof of concept for the PEP-II system and implements full-speed bunch-by-bunch signal processing for storage rings with bunch spacings of 4 ns. The design incorporates a phase-detector-based front end that digitizes the oscillation phases of bunches at the 250 MHz crossing rate, four programmable signal processors that compute correction signals, and a 250-MHz hold buffer/kicker driver stage that applies correction signals back on the beam. The design implements a general-purpose, table-driven downsampler that allows the system to be operated at several accelerator facilities. The hardware architecture of the signal processing is described, and the software algorithms used in the feedback signal computation are discussed. The system configuration used for tests at the LBL Advanced Light Source is presented.
- DOE Contract Number:
- AC03-76SF00515
- OSTI ID:
- 6654825
- Report Number(s):
- CONF-9310204-; CODEN: APCPCS; TRN: 95-003854
- Journal Information:
- AIP Conference Proceedings (American Institute of Physics); (United States), Vol. 319:1; Conference: Beam instrumentation workshop, Santa Fe, NM (United States), 20-23 Oct 1993; ISSN 0094-243X
- Country of Publication:
- United States
- Language:
- English
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