An architecture for a wafer-scale-implemented MIMD parallel computer

Miscellaneous · Fri Jan 01 00:00:00 EST 1988

OSTI ID:6596698

Wang, Chiajiu

In this dissertation, a general-purpose parallel computer architecture is proposed and studied. The proposed architecture, called the modified mesh-connected parallel computer (MMCPC) is obtained by enhancing a mesh-connected parallel computer with row buses and column buses. The MMCPC is a multiple instruction multiple data parallel machine. Because of the regular structure and distributed control mechanisms, the MMCPC is suitable for VLSI or WSI implementation. The bus structure of the MMCPC lends itself to configurability and fault tolerance. The MMCPC can be logically configured as a number of different parallel computer topologies. The MMCPC can tolerate as many faulty PE's, located randomly, as there are available spares, resulting in 100% redundancy utilization. The performance of the MMCPC was analyzed by applying a generalized stochastic Petri net graph to the MMCPC. The GSPN performance modeling results show a need for a new processing element (PE). A new PE architecture, able to handle data processing and message passing concurrently, is proposed and the silicon overhead is estimated in comparison with transputer-like PE's. Based upon the proposed PE, optimum sizes of the MMCPC for different program structures are derived. Two routing algorithms for the MMCPC were proposed and studied. Routing analysis was carried out through simulation. The simulation results show that the dynamic routing algorithm out performs the deterministic routing algorithm.

• Research Organization: Auburn Univ., AL (USA)
• OSTI ID: 6596698
• Resource Relation: Other Information: Thesis (Ph. D.)
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
PARALLEL PROCESSING
COMPUTER ARCHITECTURE
ALGORITHMS
ARRAY PROCESSORS
COMPUTERIZED SIMULATION
DESIGN
FAULT TOLERANT COMPUTERS
INFORMATION SYSTEMS
MESH GENERATION
TASK SCHEDULING
COMPUTERS
DATA PROCESSING
DIGITAL COMPUTERS
MATHEMATICAL LOGIC
PROCESSING
PROGRAMMING
SIMULATION
990200* - Mathematics & Computers
990300 - Information Handling