The architecture of a homogeneous vector supercomputer

Journal Article · Mon Sep 01 04:00:00 EDT 1986 · J. Parallel Distrib. Comput.; (United States)

DOI:https://doi.org/10.1016/0743-7315(86)90017-1· OSTI ID:6576287

Gustafson, J L; Hawkinson, S; Scott, K

A new homogeneous computer architecture developed by FPS combines two fundamental techniques for high-speed computing: parallelism based on the binary n-cube interconnect, and pipelined vector arithmetic. The design makes extensive use of VLSI technology, resulting in a processing node that can be economically replicated. Processor nodes incorporate high-speed communications and control, vector-oriented floating-point arithmetic, and a novel dual-ported memory design. Each node is implemented on a single circuit board and can perform 64-bit floating-point arithmetic at a peak speed of 12 MFLOPS. Eight nodes are grouped together with a system node and disk support to form modules. These modules, housed in cabinet-sized packages, are capable of 96 MFLOPS peak performance and make up the smallest homogeneous units of larger systems. The new FPS system achieves a careful balance between high-speed communication and floating-point computation. This paper describes the new architecture in detail and explores some of the issues in developing effective software.

• Research Organization: Floating Point Systems, Inc., Beaverton, OR 97005
• OSTI ID: 6576287
• Journal Information: J. Parallel Distrib. Comput.; (United States), Journal Name: J. Parallel Distrib. Comput.; (United States) Vol. 3:3; ISSN JPDCE
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420800 -- Engineering-- Electronic Circuits & Devices-- (-1989)
99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ARRAY PROCESSORS
CIRCUIT THEORY
COMMUNICATIONS
COMPUTER ARCHITECTURE
COMPUTER CODES
COMPUTERS
DATA TRANSMISSION
DATA-FLOW PROCESSING
DIGITAL COMPUTERS
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
MEMORY DEVICES
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PERFORMANCE
PROGRAMMING
SUPERCOMPUTERS
VECTOR PROCESSING