A 15 MHz 32-channel Flash ADC FASTBUS board for use at LEP

Conference · Sun Jan 31 23:00:00 EST 1988 · IEEE Trans. Nucl. Sci.; (United States)

OSTI ID:6502412

Crawley, H B; Gorbics, M S; Holland, G E; Homer, Jr, J F; McKay, R; Meyer, W T; Rosenberg, E I; Thomas, W D ^[1]

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1. Dept. of Physics and Ames Lab., USDOE, Iowa State Univ., Ames, IA (US)

The authors describe the design and performance of a single-width multilayer FASTBUS board for digitization of electromagnetic calorimeter data at LEP. The board consists of 32 channels of Flash ADC digitizers clocked at 15 MHz. The digitized data are filtered through a zero suppression circuit, stored in a buffer memory and then reformatted using an on-board microprocessor. The microprocessor allows the authors to efficiently perform calibration tasks such as pedestal monitoring and linearity/relative gain measurements.

• OSTI ID: 6502412
• Report Number(s): CONF-871006-
• Journal Information: IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. 35:1; ISSN IETNA
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
430400* -- Particle Accelerators-- Storage Rings
440101 -- Radiation Instrumentation-- General Detectors or Monitors & Radiometric Instruments
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
CALORIMETERS
COMPUTERS
DESIGN
DIGITIZERS
ELECTRONIC CIRCUITS
FASTBUS SYSTEM
FREQUENCY ANALYSIS
LEP STORAGE RINGS
MEASURING INSTRUMENTS
MEMORY DEVICES
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
PERFORMANCE
PULSE CIRCUITS
SIGNAL CONDITIONERS
STORAGE RINGS