Parallel microprogramming tools for a horizontally reconfigurable architecture

Journal Article · Mon Mar 31 23:00:00 EST 1986 · Int. J. Parallel Program.; (United States)

DOI:https://doi.org/10.1007/BF01414443· OSTI ID:6458701

Chiarulli, D M; Buell, D A

Software systems that allow the user to effectively exploit parallelism in an architecture are rare. This is a report on three software development tools designed for the DRAFT horizontally reconfigurable architecture machine: reconfiguring microassembler, a debug simulator, and an operating environment. In all of these tools a high priority has been placed on east of use and minimization of the programmer's responsibility for management of parallelism. At the time of this writing, the first two of these tools have been implemented and are currently in use. The operating environment, like the prototype machine, is in the final stages of construction.

• Research Organization: Louisiana State Univ., Baton Rouge
• OSTI ID: 6458701
• Journal Information: Int. J. Parallel Program.; (United States), Journal Name: Int. J. Parallel Program.; (United States) Vol. 15:2; ISSN IJPPE
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
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COMPUTER ARCHITECTURE
COMPUTERIZED SIMULATION
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DATA PROCESSING
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
MULTIPLEXERS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING
SIMULATION
SYSTEMS ANALYSIS
TASK SCHEDULING