Parallel simulated annealing algorithms for cell placement on hypercube multiprocessors
- Dept. of Electrical Engineering and the Coordinated Science Lab., Univ. of Illinois, Urbana-Champaign, IL (US)
- AT and T Bell Lab., Naperville, IL (US)
- Incredible Technologies, Arlington Heights, IL (US)
The simulated annealing technique has been applied to solve the standard cell placement problem on conventional uniprocessor computers by other researchers. These algorithms arrive at near-optimal solutions with a large probability, but take an extremely long time to execute. Some researchers have started to investigate speeding up annealing algorithms by running them on shared memory multiprocessor systems. In this paper, the authors present two parallel algorithms and their variants for standard cell placement using simulated annealing that are targeted to run on distributed memory, message-passing hypercube multiprocessors. They discuss two ways of mapping the cells in a two-dimensional area of a chip on to processors in an n-dimensional hypercube such that both small and large cell moves can be applied. Two types of moves are allowed: cell exchanges and cell displacements.
- OSTI ID:
- 6445887
- Journal Information:
- IEEE Transactions on Parallel and Distributed Systems; (USA), Vol. 1:1; ISSN 1045-9219
- Country of Publication:
- United States
- Language:
- English
Similar Records
Parallel Cholesky factorization on a hypercube multiprocessor
Parallel-sorting algorithms for hypercube multiprocessors
Related Subjects
HYPERCUBE COMPUTERS
ALGORITHMS
PARALLEL PROCESSING
TECHNOLOGY ASSESSMENT
ANNEALING
ARRAY PROCESSORS
COMPUTER CALCULATIONS
COST
MEMORY DEVICES
PERFORMANCE
SIMULATION
COMPUTERS
HEAT TREATMENTS
MATHEMATICAL LOGIC
PROGRAMMING
990200* - Mathematics & Computers