A simple VLSI architecture for neurocomputing
Recent advances in ''neural'' computation models will only demonstrate their true value with the introduction of parallel computer architectures designed to optimise the computation of these neural networks. General-purpose neurocomputers is one approach which provides a framework for executing neural networks in much the same way that traditional computers address the problems of ''number crunching'', for which they are best suited. This framework must include a means of programming (i.e. operating system and programming languages) and the hardware must exploit the properties of VLSI, for parallelism and communication. At University College London, the authors have designed and are currently implementing in CMOS, a primitive processing element for building a parallel MIMD Neurocomputer, configured from arrays of these elements connected to a host computer (Figure 1). The goal of the Neurocomputer is to support a range of Connectionist algorithms spanning both neural networks and semantic networks. The primitive processing element is a self-contained microprocessor composed of three basic units: a 16 instruction set processor, a communication unit and a small local memory. Each processing element has a neuron name, used for message routing. The communication unit provides two bi-directional parallel links (implemented by four unidirectional) and a simple protocol to support a logical bus for routing message packets.
- Research Organization:
- Dept. of Computer Science, Univ. College London, London WC1E 6BT (GB)
- OSTI ID:
- 6275327
- Report Number(s):
- CONF-8809132-
- Journal Information:
- Neural Networks; (United States), Journal Name: Neural Networks; (United States) Vol. 1:1; ISSN NNETE
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
COMMUNICATIONS
COMPUTER ARCHITECTURE
COMPUTER CALCULATIONS
COMPUTER NETWORKS
COMPUTERIZED SIMULATION
DESIGN
ELECTRONIC CIRCUITS
GEOMETRY
MATHEMATICAL LOGIC
MATHEMATICS
MEMORY DEVICES
MOS TRANSISTORS
NERVOUS SYSTEM
OPTIMIZATION
PARALLEL PROCESSING
PROGRAMMING
PROGRAMMING LANGUAGES
SEMICONDUCTOR DEVICES
SIMULATION
TRANSISTORS