A CMOS integrated timing discriminator circuit for fast scintillation counters

Journal Article · Mon Jun 01 04:00:00 EDT 1998 · IEEE Transactions on Nuclear Science

DOI:https://doi.org/10.1109/23.682627· OSTI ID:624213

Jochmann, M W ^[1]

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1. Forschungszentrum Juelich (Germany). Zentrallabor fuer Elektronik

Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t{sub r} {ge} 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal`s amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range.

• OSTI ID: 624213
• Report Number(s): CONF-971147--
• Journal Information: IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 3Pt1 Vol. 45; ISSN 0018-9499; ISSN IETNAE
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
COSY STORAGE RING
INTEGRATED CIRCUITS
PULSE DISCRIMINATORS
SCINTILLATION COUNTERS
TIMING CIRCUITS