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Title: Multiplicity-Vertex Detector Electronics Development for Heavy-Ion Detectors

Conference ·
OSTI ID:623050

This paper presents the electronics work performed to date for the Multiplicity-Vertex Detector (MVD) for the PHENIX collaboration at RHIC. The detector consists of approximately 34,000 channels of both silicon strips and silicon pads. The per-channel signal processing chain consists of a pre-amplifier gain stage, a current mode summed multiplicity discriminator, a 64 deep analog memory (simultaneous read/write), an analog correlator, and a 10-bit microsecs ADC. The system controller or Heap Manager, supplies all timing control, data buffering, and data formatting for a single 256-channel multi-chip module (MCM). Each chip set is partitioned into 32-channel sets. Prototype performance for the various blocks will be presented as well as the ionizing radiation damage performance of the 1.2 mu nwell CMOS process used for fabrication.

Research Organization:
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
Sponsoring Organization:
USDOE Office of Energy Research, Washington, DC (United States)
DOE Contract Number:
AC05-96OR22464
OSTI ID:
623050
Report Number(s):
ORNL/CP-94463; CONF-9509265-; ON: DE98000323; TRN: AD-a338 262
Resource Relation:
Conference: 1. workshop on electronics for large Hadron collider experiments, Lisbon (Portugal), 10-15 Sep 1995; Other Information: PBD: [Sep 1995]
Country of Publication:
United States
Language:
English