Microcode control of a parallel architecture microprocessor
A microprogrammed parallel processor is described including a plurality of processing units, operable under control of microinstructions each containing micro-operations, the microprogrammed parallel processor comprising: means for executing, during a cycle, each of the plurality of micro-operations, within a microinstruction, for which a required processing unit is available; means connected to the executing means for indicating which micro-operations were not executed during the cycle; means, connected to the executing means and the indicating means for recycling only those micro-operations within the microinstruction for which the indicating means indicated as not executed during the cycle, for execution by the executing means in a subsequent cycle as each required processing unit becomes available; and means, connected to the means for recycling, for storing the microinstruction until all of the plurality of micro-operations within the microinstruction are executed.
- Assignee:
- International Business Machines Corp., Armonk, NY
- Patent Number(s):
- US 4803615
- OSTI ID:
- 6215319
- Country of Publication:
- United States
- Language:
- English
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