Problem size, parallel architecture, and optimal speedup
Journal Article
·
· J. Parallel Distrib. Comput.; (United States)
The communication and synchronization overhead inherent in parallel processing can lead to situations where adding processors to the solution method actually increases execution time. Problem type, problem size, and architecture type all affect the optimal number of processors to employ. In this paper the authors examine the numerical solution of an elliptic partial differential equation in order to study the relationship between problem size and architecture. The equation's domain is discretized into n/sup 2/ grid points which are divided into partitions and mapped onto the individual processor memories. The authors analytically quantify the relationships among grid size, stencil type, partitioning strategy, processor execution time, and communication network type. In doing so, the authors determine the optimal number of processors to assign to the solution (and hence the optimal speedup), and identify (i) the smallest grid size which fully benefits from using all available processors, (ii) the leverage on performance given by increasing processor speed or communication network speed, and (ii) the suitability of various architectures for large numerical problems. Finally, the authors compare the predictions of their analytic model with measurements from a multiprocessor and find that the model accurately predict performance.
- Research Organization:
- Dept. of Computer Science, The College of William and Mary, Williamsburg, VA (US)
- OSTI ID:
- 6214660
- Journal Information:
- J. Parallel Distrib. Comput.; (United States), Journal Name: J. Parallel Distrib. Comput.; (United States) Vol. 5:4; ISSN JPDCE
- Country of Publication:
- United States
- Language:
- English
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