The data acquisition system for SLD
This paper describes the data acquisition system planned for the SLD detector, which is being constructed for use with the SLAC Linear Collider (SLC). Analog electronics, heavily incorporating hybrid and custom VLSI circuitry, is mounted on the detector itself. Extensive use is made of multiplexing through optical fibers to a FASTBUS readout system. The low repetition rate of the SLC allows a relatively simple software-based trigger. Hardware and software processors within the acquisition modules are used to reduce the large volume of data per event and to calibrate the electronics. A farm of microprocessors is used for full reconstruction of a sample of events prior to transmission to the host.
- Research Organization:
- Stanford Linear Accelerator Center, Menlo Park, CA (USA)
- DOE Contract Number:
- AC03-76SF00515
- OSTI ID:
- 6151212
- Report Number(s):
- SLAC-PUB-4297; CONF-8703128-1; ON: DE87010315
- Country of Publication:
- United States
- Language:
- English
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The data acquisition system for SLD
Data acquisition system for SLD
Related Subjects
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ACCELERATOR FACILITIES
ACCELERATORS
ANALOG SYSTEMS
CALIBRATION
CHARGE-COUPLED DEVICES
COMPUTERS
DATA ACQUISITION SYSTEMS
DATA PROCESSING
DEC COMPUTERS
DRIFT CHAMBERS
ELECTRONIC CIRCUITS
FASTBUS SYSTEM
FIBER OPTICS
LINEAR ACCELERATORS
MEASURING INSTRUMENTS
MULTIWIRE PROPORTIONAL CHAMBERS
PROCESSING
PROPORTIONAL COUNTERS
PULSE CIRCUITS
RADIATION DETECTORS
SEMICONDUCTOR DEVICES
SHOWER COUNTERS
SLC DETECTORS
STANFORD LINEAR COLLIDER
TRIGGER CIRCUITS