The data acquisition system for SLD
Conference
·
· IEEE Trans. Nucl. Sci.; (United States)
OSTI ID:6006744
This paper describes the data acquisition system planned for the SLD detector which is being constructed for use with the SLAC Linear Collider (SLC). An exclusively FASTBUS frontend system is used together with a VAX-based host system. While the volume of data transferred does not challenge the band-width capabilities of FASTBUS, extensive use is made of the parallel processing capabilities allowed by FASTBUS to reduce the data to a size which can be handled by the host system. The low repetition rate of the SLC allows a relatively simple software-based trigger. The principal components and overall architecture of the hardware and software are described.
- Research Organization:
- Stanford Linear Accelerator Center, Stanford University, Stanford, CA
- OSTI ID:
- 6006744
- Report Number(s):
- CONF-850579-
- Journal Information:
- IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-32:4; ISSN IETNA
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
43 PARTICLE ACCELERATORS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
ACCELERATOR FACILITIES
ACCELERATORS
COMPUTERIZED CONTROL SYSTEMS
COMPUTERS
CONTROL SYSTEMS
DATA ACQUISITION
DATA ACQUISITION SYSTEMS
DEC COMPUTERS
DESIGN
ELECTRONIC CIRCUITS
FASTBUS SYSTEM
LINEAR ACCELERATORS
PARALLEL PROCESSING
PROGRAMMING
PROGRAMMING LANGUAGES
PULSE CIRCUITS
STANFORD LINEAR COLLIDER
TRIGGER CIRCUITS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
ACCELERATOR FACILITIES
ACCELERATORS
COMPUTERIZED CONTROL SYSTEMS
COMPUTERS
CONTROL SYSTEMS
DATA ACQUISITION
DATA ACQUISITION SYSTEMS
DEC COMPUTERS
DESIGN
ELECTRONIC CIRCUITS
FASTBUS SYSTEM
LINEAR ACCELERATORS
PARALLEL PROCESSING
PROGRAMMING
PROGRAMMING LANGUAGES
PULSE CIRCUITS
STANFORD LINEAR COLLIDER
TRIGGER CIRCUITS