A fast linearization method to evaluate the effects of circuit contingencies upon system load bus voltages
A fast linearization method devised to evaluate the effects of single or multiple-circuit contingencies upon the system load-bus voltages is presented. Starting from a well solved loadflow base case, this method uses the standard DC Loadflow technique to estimate, under a set of certain assumptions, the change in load-bus voltages due to the outage of one or more circuits. The reactive power change required to maintain scheduled voltages at load and/or generation bus can also be computed for each single or multiple-circuit outage. The method, which is non-iterative, has been applied on the IEEE Reliability 24-bus system and also on a 125-bus model of the Mid-Continent Area Power Pool (MAPP), and has shown results comparable to those obtained from a conventional loadflow program.
- Research Organization:
- Mid Continent Area Power Pool, Minneapolis, MN
- OSTI ID:
- 5957068
- Journal Information:
- IEEE Trans. Power Appar. Syst.; (United States), Vol. PAS-101:10
- Country of Publication:
- United States
- Language:
- English
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