The UCLA mirror processor
This paper reports on the design and implementation of a VLSI RISC microprocessor, called UCLA Mirror Processor, which is capable of micro rollback. In order to achieve concurrent error detection, two Mirror Processor chips operated in lock-step, comparing external signs and a signature of internal signals every clock cycle. It a mismatch is detected, both processors roll back to the beginning of the cycle when the error occurred. In some cases erroneous state is corrected by copying a value from the fault-free processor to the faulty processor. The authors describe the architecture, microarchitecture, and VLSI implementation of the Mirror Processor, emphasizing its error-detection, error-recovery, and self-diagnosis capabilities.
- OSTI ID:
- 5900393
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
FAULT TOLERANT COMPUTERS
MONITORS
MICROPROCESSORS
COMPUTER ARCHITECTURE
ERRORS
RELIABILITY
SIGNAL CONDITIONING
SYSTEMS ANALYSIS
COMPUTERS
DIGITAL COMPUTERS
ELECTRONIC CIRCUITS
MEASURING INSTRUMENTS
MICROELECTRONIC CIRCUITS
990200* - Mathematics & Computers