Fast and processor-efficient parallel algorithms for reducible-flow graphs. Technical report

Technical Report · Tue Nov 01 04:00:00 EST 1988

OSTI ID:5891164

Ramachandran, V

This document presents parallel NC algorithms for recognizing reducible flow graphs (rfg's), and for finding dominators, minimum feedback vertex sets, and a depth first-search numbering in an rfg. All of these algorithms run in polylog parallel time using M (n) processors, where M (n) is the number of processors needed to multiply two nxn matrices in polylog time; this is the best processor bound currently known for polylog-time parallel algorithms for directed graphs. It is shown that finding a minimum feedback vertex in vertex-weighted rfg's or finding a minimum feedback arc set in arc-weighted rfg's is complete. For arc or vertex weights in unary, the authors presents RNC algorithms for these problems and shows that these problems are in NC if and only if the problem of finding a maximum matching is in NC.

• Research Organization: Illinois Univ., Urbana (USA). Coordinated Science Lab.
• OSTI ID: 5891164
• Report Number(s): AD-A-201651/7/XAB; UILU-ENG-88-2257
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
DATA-FLOW PROCESSING
DOCUMENT TYPES
FEEDBACK
GRAPHS
MATHEMATICAL LOGIC
MATRICES
PARALLEL PROCESSING
PROGRAMMING
PROGRESS REPORT