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Title: Modeling and simulation of the SDC Data Collection Chip

Conference ·
OSTI ID:5826093

This paper describes modeling and simulation of the Data Collection Chip (DCC) design for the Solenoidal Detector Collaboration (SDC). Models of the DCC written in Verilog and VHDL are described, and results are presented. The models have been simulated to study queue depth requirements and to compare control feedback alternatives. Insight into the management of models and simulation tools is given. Finally, techniques useful in the design process for data acquisition systems are discussed.

Research Organization:
Illinois Univ., Urbana, IL (United States)
Sponsoring Organization:
USDOE; USDOE, Washington, DC (United States)
DOE Contract Number:
AC02-76ER01195
OSTI ID:
5826093
Report Number(s):
UIUC-HEPG-91-80; CONF-9106122-6; ON: DE92008222
Resource Relation:
Conference: 7. international conference on real time computer applications in nuclear, particle and plasma physics, Juelich (Germany), 18-28 Jun 1991
Country of Publication:
United States
Language:
English