Implementation of digital filtering algorithms using pipelined vector processors

Journal Article · Tue Sep 01 00:00:00 EDT 1987 · Proc. IEEE; (United States)

OSTI ID:5756708

Sung, W; Mitra, S K

The implementation of digital filtering algorithms using pipelined vector processors is investigated. Modeling of vector processors and vectorization methods are explained, and then the performances of several implementation methods are evaluated based on the model. Vector processor implementation of FIR filtering algorithms using the outer product method and the indirect convolution method is evaluated. Recursive and adaptive filtering algorithms, which lead to dependency problems in direct vector processor implementations, are implemented very efficiently using a newly developed vectorization method.

• Research Organization: Signal Processing Lab., Dept. of Electrical and Computer Engineering, Univ. of California, Santa Barbara, CA 93106
• OSTI ID: 5756708
• Journal Information: Proc. IEEE; (United States), Journal Name: Proc. IEEE; (United States) Vol. 75:9; ISSN IEEPA
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
COMPUTERIZED SIMULATION
COMPUTERS
CRAY COMPUTERS
DIGITAL COMPUTERS
DIGITAL FILTERS
EFFICIENCY
IMPLEMENTATION
MATHEMATICAL LOGIC
PARALLEL PROCESSING
PERFORMANCE
PROGRAMMING
SIMULATION
SUPERCOMPUTERS
TENSORS
VECTOR PROCESSING
VECTORS