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A parallel block cyclic reduction algorithm for the fast solution of elliptic equations

Conference ·
OSTI ID:5735019

This paper presents an adaptation of the Block Cyclic Reduction (BCR) algorithm for a multi-vector processor. The main bottleneck of BCR lies in the solution of linear systems whose coefficient matrix is the product of tridiagonal matrices. This bottleneck is handled by expressing the rational function corresponding to the inverse of this product as a sum of elementary fractions. As a result the solution of this system leads to parallel solutions of tridiagonal systems. Numerical experiments performed on an Alliant FX/8 are reported. 11 refs., 1 tab.

Research Organization:
Illinois Univ., Urbana (USA). Center for Supercomputing Research and Development
DOE Contract Number:
FG02-85ER25001
OSTI ID:
5735019
Report Number(s):
DOE/ER/25001-47; CONF-8706183-4; CSRD-659; ON: DE88003595
Country of Publication:
United States
Language:
English