Video Analysis Transputer Array (VATA)
This paper presents (a) an overview of the Inmos transputer and its use in parallel arrays for image processing, (b) a functional block-level description of IBM-AT-compatible boards for signal/image processing research using transputers with reconfigurable interconnection topologies, and (c) an overview of the OCCAM and C programming tools for placing parallel algorithms onto such a processor. The hardware consists of two custom printed-circuit boards (and two commercially available boards) within an IBM-AT host. The first provides a flexible input/output interface between a general-purpose high-speed input-data bus and the transputer array. The second contains 32 transputers and 4 programmable crossbar-switch interconnection chips. Several copies of the second board can be cascaded (or even partially-unpopulated) to provide for an arbitrary number of transputer chips. Each one of these boards will perform about 128 million Whetstones or, for highly regular algorithms, a sustained 48 MFLOPS.
- Research Organization:
- Naval Ocean Systems Center, San Diego, CA (USA)
- OSTI ID:
- 5662855
- Report Number(s):
- AD-A-209023/1/XAB
- Country of Publication:
- United States
- Language:
- English
Similar Records
Transputers and the OCCAM programming language. November 1988-December 1989 (Citations from the INSPEC: Information Services for the Physics and Engineering Communities data base). Report for November 1988-December 1989
Transputers and the occam programming language. January 1975-October 1988 (Citations from the INSPEC: Information Services for the Physics and Engineering Communities data base). Report for January 1975-October 1988
Related Subjects
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
COMPUTERS
DIGITAL COMPUTERS
ELECTRONIC CIRCUITS
IMAGE PROCESSING
INTERFACES
MATHEMATICAL LOGIC
MATHEMATICS
ORIENTATION
PARALLEL PROCESSING
PRINTED CIRCUITS
PROCESSING
PROGRAMMING
SIGNAL CONDITIONING
SUPERCOMPUTERS
TOPOLOGY