Parallel algorithms and architectures for binary image component labeling

Book · Thu Jan 01 04:00:00 EST 1987

OSTI ID:5545411

Pham, Q T

The authors consider parallel algorithms in the PRAM (Parallel Random Access Machine) and SIMD (Single Instruction, Multiple Data Stream) models, and SIMD architectures for binary image component labeling, contour filling component shrinking and component counting. Current proposed SIMD architectures do not support efficient algorithms for the above three global operations (for images consisting of N pixels, the best time complexities of algorithms for component labeling are O(N/sup 1/2/) on the mesh-connected computer and O(N/sup 1/4/) on the pyramid computer). Current SIMD algorithms are complex, difficult to understand and highly dependent on the topology of the SMD interconnection network. The authors first give two O(log N) time, O(N) processor PRAM algorithms for the above operations. They then propose a general technique to map a certain type of PRAM algorithms into two proposed SIMD architectures with O(log/sup 2/N) time penalty for PRAM concurrent read and concurrent write operations. In particular, they apply this technique to the above PRAM algorithms to obtain two O(log/sup 3/N) time, O(N) processor SIMD algorithms which are more efficient than any other known SIMD algorithms for the above three operations.

• OSTI ID: 5545411
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
990220 -- Computers
Computerized Models
& Computer Programs-- (1987-1989)
ADVANCED COMPONENTS TEST FACILITY
ALGORITHMS
CHEMICAL ANALYSIS
COMPUTER ARCHITECTURE
COMPUTER CODES
COMPUTER NETWORKS
IMAGES
MATHEMATICAL LOGIC
NONDESTRUCTIVE ANALYSIS
O CODES
P CODES
PARALLEL PROCESSING
PIXE ANALYSIS
PROGRAMMING
S CODES
TEST FACILITIES
X-RAY EMISSION ANALYSIS