The use of scan paths in the debugging and testing of the EPSILON-2 research computer

Conference · Tue Jan 01 04:00:00 EST 1991

OSTI ID:5517762

Grafe, V G; Martinez, L G; Davidson, G S

Scan path testing and debugging offers a structured, proven way to debug and test arbitrarily complex electronic systems. The interface and equipment requirements are far lower than traditional debug and test techniques. The system is also completely testable even when physically remote from the lab where it was originally developed. This report describes our experience using scan techniques to debug the EPSILON-2 processor board, a system with over 300 ICs and over 2500 independently controllable and observable test points. The debug time of the circuit was greatly reduced by the adoption of scan path methodology. The use of expensive test equipment was drastically reduced, and the level of control of the circuitry increased. We have run tests on the processor from physically remote sites. Our experiences are described, and the adoption of scan path techniques is shown to be simple enough that it should be useful in all electronic projects. 8 refs., 12 figs.

• Research Organization: Sandia National Labs., Albuquerque, NM (USA)
• Sponsoring Organization: DOE; USDOE, Washington, DC (USA)
• DOE Contract Number: AC04-76DP00789
• OSTI ID: 5517762
• Report Number(s): SAND-91-1496C; CONF-9109193--1; ON: DE91014893
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
426000 -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
COMPUTER ARCHITECTURE
COMPUTER NETWORKS
COMPUTERS
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
TESTING