Permutations on Illiac IV-type networks

Journal Article · Tue Jul 01 04:00:00 EDT 1986 · IEEE Trans. Comput.; (United States)

DOI:https://doi.org/10.1109/TC.1986.1676812· OSTI ID:5516693

Raghavendra, C S; Kumar, V K.P.

Performing permutations of data on SIMD computers efficiently is important for high-speed execution of parallel algorithms. In this correspondence we consider realizing permutations such as perfect shuffle, matrix transpose, bit reversal, the class of bit-permute-complement (BPC), the class of Omega, and inverse Omega permutations on N = 2/sup n/ processors with Illiac IV-type interconnection network, where each processor is connected to processors at distances of +.1 and +. ..sqrt..N. The minimum number of data transfer operations required for realizing any of these permutations on such a network is shown to be 2(..sqrt..N - 1). The authors provide a general three-phase strategy for realizing permutations and derive routing algorithms for performing perfect shuffle, Omega, Inverse Omega, bit reversal, and matrix-transpose permutations in 2(..sqrt..N - 1) steps. Their approach is quite simple, and unlike previous approaches, makes efficient use of the topology of the Illiac IV-type network to realize these permutations using the optimum number of data transfers. The strategy is quite powerful: any permutation can be realized using this strategy in 3(..sqrt..N - 1) steps.

• Research Organization: Dept. of Electrical Engineering-Systems, Univ. of Southern California, Los Angeles, CA 90089
• OSTI ID: 5516693
• Journal Information: IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. C-35:7; ISSN ITCOB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
ARRAY PROCESSORS
COMMUNICATIONS
DATA TRANSMISSION
DISTANCE
EFFICIENCY
MATHEMATICAL LOGIC
MATHEMATICS
OPTIMIZATION
PARALLEL PROCESSING
PERFORMANCE
PROGRAMMING
ROUTING
TOPOLOGY