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Title: A high performance architecture for prolog

Abstract

Artificial Intelligence is entering the mainstream of computer applications and as techniques are developed and integrated into a wide variety of areas they are beginning to tax the processing power of conventional architecture. To meet this demand, specialized architectures providing support for the unique features of symbolic processing languages are emerging. The goal of the research presented here is to show that an architecture specialized for Prolog can achieve a ten-fold improvement in performance over conventional general-purpose architecture, and presents such an architecture for high performance execution of Prolog programs. The architecture is based on the abstract machine description known as the Warren Abstract Machine (WAM). The execution model of the WAM is described and extended to provide a complete Instruction Set Architecture (ISA) for Prolog known as the PLM. The ISA is then realized in a microarchitecture and finally in a hardware design.

Authors:
Publication Date:
OSTI Identifier:
5435743
Alternate Identifier(s):
OSTI ID: 5435743
Resource Type:
Book
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; COMPUTER ARCHITECTURE; COMPARATIVE EVALUATIONS; PERFORMANCE; PROLOG; ARTIFICIAL INTELLIGENCE; PROGRAMMING LANGUAGES 990210* -- Supercomputers-- (1987-1989)

Citation Formats

Dobry, T. A high performance architecture for prolog. United States: N. p., 1987. Web.
Dobry, T. A high performance architecture for prolog. United States.
Dobry, T. Thu . "A high performance architecture for prolog". United States. doi:.
@article{osti_5435743,
title = {A high performance architecture for prolog},
author = {Dobry, T.},
abstractNote = {Artificial Intelligence is entering the mainstream of computer applications and as techniques are developed and integrated into a wide variety of areas they are beginning to tax the processing power of conventional architecture. To meet this demand, specialized architectures providing support for the unique features of symbolic processing languages are emerging. The goal of the research presented here is to show that an architecture specialized for Prolog can achieve a ten-fold improvement in performance over conventional general-purpose architecture, and presents such an architecture for high performance execution of Prolog programs. The architecture is based on the abstract machine description known as the Warren Abstract Machine (WAM). The execution model of the WAM is described and extended to provide a complete Instruction Set Architecture (ISA) for Prolog known as the PLM. The ISA is then realized in a microarchitecture and finally in a hardware design.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Thu Jan 01 00:00:00 EST 1987},
month = {Thu Jan 01 00:00:00 EST 1987}
}

Book:
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  • Artificial intelligence is entering the mainstream of computer applications and, as techniques are developed and integrated into a wide variety of areas, they are beginning to tax the processing power of conventional architectures. To meet this demand, specialized architectures providing support for the unique features of symbolic processing languages are emerging. The goal of the research presented here is to show that an architecture specialized for Prolog can achieve a tenfold improvement in performance over conventional, general-purpose architectures. This dissertation presents such an architecture for high performance execution of Prolog programs. The architecture is based on the abstract machine descriptionmore » introduced by David H.D. Warren known as the Warren Abstract Machine (WAM). The execution model of the WAM is described and extended to provide a complete Instruction Set Architecture (ISA) for Prolog known as the PLM. This ISA is then realized in a microarchitecture and finally in a hardware design.« less
  • Four reduced-instruction-set computer (RISC) architectures for Prolog are presented: the Simple Abstract Machine (SAM), the Logic Programming Windowed RISC I (LOW RISC I), the LOW RISC II, and the Logical Inference Balanced RISC Architecture (LIBRA). An informal methodology for the semantic-based design of computer architectures relates the design of each architecture to its predecessor. The suitability of each architecture for Prolog is evaluated using macro expansions for each WAM instruction, from which execution speed, code density, memory usage, branch frequency, standard logical inferences per second, benchmark logical inferences per second and the semantic gap of each architecture relative to Prologmore » are calculated. The final design, the LIBRA, is 2.3 times as fast as the Berkeley PLM without interleaved memory, and 15 times as fast with eight-way instruction and data memory interleaving, reaching an estimated execution speed of 7.5 million standard logical inferences per second. The LIBRA's performance is due to parallelized tag and data operations, pipelining, reduced branch frequency, and complex single-cycle instructions.« less
  • A significant portion of computer design activity has shifted toward high-performance designs as single-user desktop computers reach the point of delivering more computer power than yesterday's mainframes. This book presents design ideas embodied in many of these high-performance machines and stresses techniques for evaluating them. It develops an understanding of the design process by treating the various tradeoffs that exist in design choices. The author shows how good designs make efficient use of available technology and achieve balanced, efficient structures matched well to the class of problems they attack. The book stresses the means to achieve balance and efficiency inmore » high-performance designs regardless of the underlying technology. Topics covered include: General architectural approaches such as memory designs, pipeline techniques, and parallel structures; fundamental bottlenecks such as memory bandwidth, processing bandwidth, communications, and synchronization; evaluation techniques; examples of real applications and their architectural requirements.« less
  • In this paper, the authors discuss the implementation of a parallel Prolog interpreter on different parallel machines. The implementation is based on the REDUCE--OR process model which exploits both AND and OR parallelism in logic programs. It is machine independent as it runs on top of the chare-kernel--a machine-independent parallel programming system. The authors also give the performance of the interpreter running a diverse set of benchmark pargrams on parallel machines including shared memory systems: an Alliant FX/8, Sequent and a MultiMax, and a non-shared memory systems: Intel iPSC/32 hypercube, in addition to its performance on a multiprocessor simulation system.
  • Memory Performance of Prolog Architectures addresses these problems and reports dynamic data and instruction referencing characteristics of both sequential and parallel prolog architectures and corresponding uni-processor and multi-processor memory-hierarchy performance tradeoffs. Computer designers and logic programmers will find this work to be a valuable reference with many practical applications. Memory Performance of Prolog Architectures will also serve as an important textbook for graduate level courses in computer architecture and/or performance analysis.