Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Gated solid state FET relay

Patent ·
OSTI ID:5396545
A solid state relay circuit is described for switching power to an electrical load comprising; a load lead for connection to the electrical load, a positive supply lead for connection to a source of positive electrical potential, a control signal lead, an N-channel MOS-FET having drain and source and gate terminals with the drain terminal connected to the positive power supply lead and the source terminal connected to the load lead characterized by gated oscillator means receiving power from the power supply lead and connected to the control signal lead and having an output terminal and for oscillating to produce a voltage at the output terminal and to cease oscillating to terminate voltage at the output terminal in response to electrical signals on the control signal lead and voltage multiplier means interconnecting the oscillator output terminal and the gate of the MOS-FET for multiplying the output voltage from the oscillator means for driving the MOS-FET into conduction to power the load during oscillation of the oscillation means.
Assignee:
NOV; EDB-86-151877; NOV-85-018929
Patent Number(s):
US 4603269
OSTI ID:
5396545
Country of Publication:
United States
Language:
English