Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

Journal Article · Sat Oct 01 04:00:00 EDT 1983 · IEEE Trans. Nucl. Sci.; (United States)

DOI:https://doi.org/10.1109/TNS.1983.4333058· OSTI ID:5331271

Larwill, M; Barsotti, E; Lesny, D; Pordes, R

This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor.

• Research Organization: Fermi National Accelerator Lab, P.O. Box 500, Batavia, IL
• OSTI ID: 5331271
• Journal Information: IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-30:5; ISSN IETNA
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
430303* -- Particle Accelerators-- Experimental Facilities & Equipment
440104 -- Radiation Instrumentation-- High Energy Physics Instrumentation
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ACCELERATORS
COMPUTERS
CYCLIC ACCELERATORS
DATA ACQUISITION SYSTEMS
DATA PROCESSING
DEC COMPUTERS
EQUIPMENT INTERFACES
FASTBUS SYSTEM
FERMILAB ACCELERATOR
HIGH ENERGY PHYSICS
PHYSICS
PROCESSING
SYNCHROTRONS