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MOS flat-band capacitance method at low temperatures

Journal Article · · IEEE (Institute of Electrical and Electronics Engineers) Transactions on Electron Devices; (USA)
DOI:https://doi.org/10.1109/16.30956· OSTI ID:5295535
;  [1]
  1. Pennsylvania State Univ., University Park, PA (USA). Dept. of Electrical Engineering

The expression C/sub FB/ = C/sub ox/ x ({element of}/sub si//L/sub D/)/(C/sub ox/ + ({Epsilon}/sub si//L/sub D/)) (where L/sub D/ is the Debye length), commonly used for the flat-band capacitance of the MOS structure, is invalid in the temperature range below 100 {Kappa}. Consequently, significant error may be encountered when the flat-band capacitance method is used to extract the flat-band voltage V/sub FB/, which is of considerable interest for both the modeling and characterization of MOS devices. To extend this method to low-temperature CMOS applications one has to use a more general model that can be obtained by applying Fermi-Dirac statistics and taking into account the impurity freezeout effect. The authors show that when the temperature dependence of V/sub FB/ is extracted using this approach, the experimental data for n/sup +/ polysilicon gate MOS capacitors are in a good agreement with a simple model.

OSTI ID:
5295535
Journal Information:
IEEE (Institute of Electrical and Electronics Engineers) Transactions on Electron Devices; (USA), Journal Name: IEEE (Institute of Electrical and Electronics Engineers) Transactions on Electron Devices; (USA) Vol. 36:8; ISSN 0018-9383; ISSN IETDA
Country of Publication:
United States
Language:
English