Implementation of a fully reconfigurable multimicroprocessor
Conference
·
OSTI ID:5179243
The fully reconfigurable multimicroprocessor is an experimental configuration designed specifically as a research tool for implementing and evaluating parallel-processing algorithms on various multiprocessor architectures. Basically, the system is a shared-memory MIMD (multiple instruction-multiple data stream) machine which supports reconfiguration between processor and memory nodes to permit experimentation on architectures sharing common memory, networks of processors with only local memory, etc. This experimental computer system is currently under development within the Computing Division at the Los Alamos Laboratory. The hardware architecture is presented. 5 references.
- OSTI ID:
- 5179243
- Report Number(s):
- CONF-820908-
- Country of Publication:
- United States
- Language:
- English
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