Plex: automatically generated microcomputer layouts
Conference
·
OSTI ID:5139974
A program has been developed that automatically generates VLSI layouts of microcomputers tailored to user specifications. Most major features of the generated microcomputers, such as the data-word size, the number of registers, and the instruction-memory and data-memory size, can be varied. The resulting microcomputers are small enough to be used as components on a custom VLSI chip. The machine have separate instruction and data space, three levels of pipelining, and execute an instruction every clock cycle. 1 ref.
- OSTI ID:
- 5139974
- Country of Publication:
- United States
- Language:
- English
Similar Records
Implementation of the PIPE processor
Flexible single chip solution paves way for low cost DSP
High-bandwidth/low-latency temporary storage for supercomputers
Journal Article
·
Mon Dec 31 23:00:00 EST 1990
· Computer; (United States)
·
OSTI ID:5987557
Flexible single chip solution paves way for low cost DSP
Book
·
Fri Dec 31 23:00:00 EST 1982
·
OSTI ID:5421181
High-bandwidth/low-latency temporary storage for supercomputers
Thesis/Dissertation
·
Wed Dec 31 23:00:00 EST 1986
·
OSTI ID:5501780