To copy or not to copy: A compile-time technique for assessing when data copying should be used to eliminate cache conflicts

Book · Fri Dec 31 04:00:00 EST 1993

OSTI ID:46236

Temam, O; Granston, E D ^[1]; Jalby, W ^[2]

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1. Leiden Univ. (Netherlands). High Performance Computing Division
2. Univ. de Versailles (France)

In recent years, loop tiling has become an increasingly popular technique for increasing cache effectiveness. This is accomplished by transforming a loop nest so that the temporal and spatial locality can be better exploited for a given cache size. However, this optimization only targets the reduction of capacity misses. As recently demonstrated by several groups of researchers, conflict misses can still preclude effective cache utilization. Moreover, the severity of cache conflicts can vary greatly with slight variations in problem size and starting addresses, making performance difficult to even predict, let alone optimize. To reduce conflict misses, data copying has been proposed. With this technique, data layout in cache is adjusted by copying array tiles into temporary arrays that exhibit better cache behavior. Although copying has been proposed as the panacea to the problem of cache conflicts, this solution experiences a cost proportional to the amount of data being copied. To date, there has been no discussion regarding either this tradeoff or the problem of determining what and when to copy. In this paper, the authors present a compile-time technique for making this determination, and present a selective copying strategy based on this methodology. Preliminary experimental results demonstrate that, because of the sensitivity of cache conflicts to small changes in problem size and base addresses, selective copying can lead to better overall performance than either no copying, complete copying, or copying based on manually applied heuristics.

• OSTI ID: 46236
• Report Number(s): CONF-931115--
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
COST BENEFIT ANALYSIS
EXPERIMENTAL DATA
MEMORY DEVICES
MEMORY MANAGEMENT
SUPERCOMPUTERS
TRANSLATORS