A VME 32 channel pipeline TDC module with TMC LSIs

Journal Article · Sat Jun 01 04:00:00 EDT 1996 · IEEE Transactions on Nuclear Science

DOI:https://doi.org/10.1109/23.507225· OSTI ID:276503

Shirasu, Hideki; Murata, Toshimitsu; Emura, Tsuneo ^[1]; Arai, Yasuo; Ikeno, Masahiro ^[2]

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1. Tokyo Univ. of Agriculture and Technology, Koganei, Tokyo (Japan)
2. National Lab. for High Energy Physics, Tsukuba, Ibaraki (Japan)

A new 32-channel pipeline TDC module, which implements custom-developed Time Memory Cell LSIs, has been developed for high-rate wire-chamber applications. The module has achieved a 370 ps time resolution, and records data for a period of 3.2 {micro}sec. To handle the large data size, a digital signal processor (DSP56002) is implemented in the module. Most of the control logic is implemented in two complex PLDs to achieve a density of 32 channels in a single-width, double-height VME module.

• OSTI ID: 276503
• Report Number(s): CONF-951073--
• Journal Information: IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 3Pt2 Vol. 43; ISSN 0018-9499; ISSN IETNAE
• Country of Publication: United States
• Language: English

Related Subjects

44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
ANALOG-TO-DIGITAL CONVERTERS
DATA ACQUISITION SYSTEMS
DATA TRANSMISSION
ELECTRONIC CIRCUITS
READOUT SYSTEMS
TIMING CIRCUITS
WIRE SPARK CHAMBERS