Hybrid Voltage Balancing Approach for Series-Connected SiC MOSFETs for DC–AC Medium-Voltage Power Conversion Applications

Lin, Xiang; Ravi, Lakshmi; Burgos, Rolando; Dong, Dong

doi:10.1109/tpel.2022.3149146

Hybrid Voltage Balancing Approach for Series-Connected SiC MOSFETs for DC–AC Medium-Voltage Power Conversion Applications

Journal Article · Sun Feb 06 23:00:00 EST 2022 · IEEE Transactions on Power Electronics

DOI:https://doi.org/10.1109/tpel.2022.3149146· OSTI ID:2441276

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Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA (United States); Virginia Polytechnic Institute and State University
Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA (United States)

Due to its fast switching speed, the voltage sharing of series-connected SiC MOSFETs is more sensitive to the parasitic components from the power modules and the system, which results in more challenges for voltage balancing control. For two series-connected SiC MOSFETs realized by one half-bridge module, the detailed analysis and measurement indicate that the unbalanced parasitic capacitors inside the power module comprise the dominant factor causing the difference of turn-off dv/dt. In this paper, the traditional gate turn-off delay-time control is first used as an example to analyze the limitation of the existing active voltage balancing (AVB) control methods under AC load current: 1) AVB control has a limitation to adjust delay time accurately under AC current; 2) the voltage imbalance of the body diodes cannot be solved by AVB control. To achieve voltage balancing control of series-connected SiC MOSFETs and body diodes, this paper proposes a new two-part hybrid approach: 1) passive dv/dt compensation: one small compensation capacitor is applied to balance the non-uniform distribution of parasitic capacitors inside the power module, so the seriesconnected MOSFETs can have the same turn-off dv/dt; 2) active gate signal turn-off time adjustment: a closed-loop delay time control is applied to compensate the gate signal mismatch of MOSFETs. Furthermore, to verify the proposed balancing approach, a singlephase pump-back test is conducted to show the improvement of voltage sharing of both MOSFETs and body diodes.

View Accepted Manuscript (DOE)

Research Organization:: Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA (United States)

Sponsoring Organization:: USDOE Office of Energy Efficiency and Renewable Energy (EERE)

Grant/Contract Number:: EE0006521

OSTI ID:: 2441276

Alternate ID(s):: OSTI ID: 1980558

Journal Information:: IEEE Transactions on Power Electronics, Journal Name: IEEE Transactions on Power Electronics Journal Issue: 7 Vol. 37; ISSN 0885-8993

Publisher:: IEEECopyright Statement

Country of Publication:: United States

Language:: English

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Parasitic capacitors
series-connected SiC MOSFETs
voltage balancing

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