Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors
- Department of Materials Science, i3N/CENIMAT, Faculty of Science and Technology, Universidade NOVA de Lisboa and CEMOP/UNINOVA, Campus de Caparica, 2829-516 Caparica (Portugal)
- Universidade do Algarve, FCT, 8000-139 Faro (Portugal)
The impact of a parylene top-coating layer on the illumination and bias stress instabilities of indium-gallium-zinc oxide thin-film transistors (TFTs) is presented and discussed. The parylene coating substantially reduces the threshold voltage shift caused by continuous application of a gate bias and light exposure. The operational stability improves by 75%, and the light induced instability is reduced by 35%. The operational stability is quantified by fitting the threshold voltage shift with a stretched exponential model. Storage time as long as 7 months does not cause any measurable degradation on the electrical performance. It is proposed that parylene plays not only the role of an encapsulation layer but also of a defect passivation on the top semiconductor surface. It is also reported that depletion-mode TFTs are less sensitive to light induced instabilities. This is attributed to a defect neutralization process in the presence of free electrons.
- OSTI ID:
- 22594322
- Journal Information:
- Applied Physics Letters, Vol. 109, Issue 5; Other Information: (c) 2016 Author(s); Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
GENERAL PHYSICS
75 CONDENSED MATTER PHYSICS
SUPERCONDUCTIVITY AND SUPERFLUIDITY
ELECTRIC POTENTIAL
ELECTRONS
ENCAPSULATION
GALLIUM OXIDES
ILLUMINANCE
INDIUM OXIDES
INSTABILITY
LAYERS
PASSIVATION
PERFORMANCE
SEMICONDUCTOR MATERIALS
STABILITY
STRESSES
SURFACES
THIN FILMS
TRANSISTORS
ZINC OXIDES