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Title: Enhancement of carrier mobility in MoS{sub 2} field effect transistors by a SiO{sub 2} protective layer

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.4950850· OSTI ID:22591744
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  1. Institute of Microelectronics and Tsinghua National Laboratory for Information Science and Technology (TNList), Tsinghua University, Beijing 100084 (China)
  2. Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Beijing 100190 (China)

Molybdenum disulfide is a promising channel material for field effect transistors (FETs). In this paper, monolayer MoS{sub 2} grown by chemical vapor deposition (CVD) was used to fabricate top-gate FETs through standard optical lithography. During the fabrication process, charged impurities and interface states are introduced, and the photoresist is not removed cleanly, which both limit the carrier mobility and the source-drain current. We apply a SiO{sub 2} protective layer, which is deposited on the surface of MoS{sub 2}, in order to avoid the MoS{sub 2} directly contacting with the photoresist and the ambient environment. Therefore, the contact property between the MoS{sub 2} and the electrodes is improved, and the Coulomb scattering caused by the charged impurities and the interface states is reduced. Comparing MoS{sub 2} FETs with and without a SiO{sub 2} protective layer, the SiO{sub 2} protective layer is found to enhance the characteristics of the MoS{sub 2} FETs, including transfer and output characteristics. A high mobility of ∼42.3 cm{sup 2}/V s is achieved, which is very large among the top-gate CVD-grown monolayer MoS{sub 2} FETs.

OSTI ID:
22591744
Journal Information:
Applied Physics Letters, Vol. 108, Issue 20; Other Information: (c) 2016 Author(s); Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
Country of Publication:
United States
Language:
English