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Title: In-situ SiN{sub x}/InN structures for InN field-effect transistors

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.4945668· OSTI ID:22591529
 [1]; ; ; ; ;  [1];  [2]
  1. Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece)
  2. Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece)

Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performance was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.

OSTI ID:
22591529
Journal Information:
Applied Physics Letters, Vol. 108, Issue 14; Other Information: (c) 2016 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
Country of Publication:
United States
Language:
English