Influence of Al{sub 2}O{sub 3} layer insertion on the electrical properties of Ga-In-Zn-O thin-film transistors
- Department of Electronics and Bioinformatics, School of Science and Technology, Meiji University, 1-1-1 Higashimita, Tama-ku, Kawasaki, Kanagawa 214-8571, Japan and Nano-Electronics Materials Unit, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba 305-0044 (Japan)
- MANA Foundry and Nano-Electronics Materials Unit, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba 305-0044 (Japan)
- International Center for Materials Nanoarchitectonics (WPA-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba 305-0044 (Japan)
- MANA Foundry, International Center for Materials Nanoarchitectonics, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba 305-0044 (Japan)
- Nano-Electronics Materials Unit, International Center for Materials Nanoarchitectonics (WPA-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba 305-0044 (Japan)
- Department of Electronics and Bioinformatics, School of Science and Technology, Meiji University, 1-1-1 Higashimita, Tama-ku, Kawasaki, Kanagawa 214-8571 (Japan)
To investigate the influence of ionic/covalent interface of Al{sub 2}O{sub 3}/SiO{sub 2} gate insulator on the electrical properties of thin-film transistors (TFTs) with ionic Ga-In-Zn-O (GIZO) semiconducting channel layers, Al{sub 2}O{sub 3} layers of different thickness were introduced between SiO{sub 2} and GIZO using plasma-enhanced atomic layer deposition. The GIZO layers were obtained by DC magnetron sputtering using a GIZO target (Ga:In:Zn = 1:1:1 mol. %). The GIZO TFTs with an Al{sub 2}O{sub 3}/SiO{sub 2} gate insulator exhibited positive threshold voltage (V{sub th}) shift (about 1.1 V), V{sub th} hysteresis suppression (0.23 V), and electron mobility degradation (about 13%) compared with those of a GIZO TFT with SiO{sub 2} gate insulator by the influence of ionic/ionic and ionic/covalent interface at Al{sub 2}O{sub 3}/GIZO and Al{sub 2}O{sub 3}/SiO{sub 2}, respectively. To clarify the origin of the positive V{sub th} shift, the authors estimated the shifts of flatband voltage (0.4 V) due to the dipole and the fixed charge (−1.1 × 10{sup 11}/cm{sup 2}) at Al{sub 2}O{sub 3}/SiO{sub 2} interface, from capacitance–voltage data for Pt/Al{sub 2}O{sub 3}/SiO{sub 2}/p-Si capacitors. Based on these experimental data, the authors found that the positive V{sub th} shift (1.1 V) could be divided into three components: the dipole (−0.4 V) and fixed charge (0.15 V) at the SiO{sub 2}/Al{sub 2}O{sub 3} interface, and the fixed charge (1.35 V) at the Al{sub 2}O{sub 3}/GIZO interface. Finally, it is noted that heterointerface of SiO{sub 2}/Al{sub 2}O{sub 3}/GIZO stacks is important not only to recognize mechanism of V{sub th} shift but also to design future TFTs with high-k dielectrics and low operating voltage.
- OSTI ID:
- 22479673
- Journal Information:
- Journal of Vacuum Science and Technology. A, Vacuum, Surfaces and Films, Vol. 33, Issue 6; Other Information: (c) 2015 American Vacuum Society; Country of input: International Atomic Energy Agency (IAEA); ISSN 0734-2101
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
SUPERCONDUCTIVITY AND SUPERFLUIDITY
42 ENGINEERING
ALUMINIUM OXIDES
CAPACITANCE
CAPACITORS
COVALENCE
DESIGN
DIELECTRIC MATERIALS
DIPOLES
ELECTRIC POTENTIAL
ELECTRON MOBILITY
HYSTERESIS
INTERFACES
LAYERS
MAGNETRONS
PLASMA
SILICA
SILICON OXIDES
SPUTTERING
THIN FILMS
TRANSISTORS