Structural and electrical characterization of CoTiN metal gates
- Materials Science and Engineering, Stanford University, Stanford, California 94305 (United States)
- Electrical Engineering, Stanford University, Stanford, California 94305 (United States)
As the gate size continues to decrease in nanoscale transistors, having metal gates with amorphous or near amorphous structures can potentially reduce grain-induced work function variation. Furthermore, amorphous materials are known to have superior diffusion barrier properties, which can help prevent work function change due to the diffusion of metals in contact with the gate. In this work we show that with the addition of cobalt, thin films of polycrystalline TiN become more amorphous with a smaller grain size. Co{sub x}(TiN){sub 1-x} films, where x = 60–80%, appear to consist of nanocrystals embedded in an amorphous matrix, and are thermally stable with no significant crystallization up to an annealing temperature of at least 600 °C. Reducing the nitrogen gas flow ratio during sputter deposition from 9% to 2.5% further decreases the films' crystallinity, which is apparent by more sparse and even smaller nanocrystals. In addition to being partially amorphous, these CoTiN films also exhibit good thermal stability, low resistivity, low roughness, and have the potential for atomic layer deposition compatibility. Even though these materials are not completely amorphous, their small crystal size and amorphous matrix can potentially reduce work function variation and improve their diffusion barrier property. These properties make CoTiN a good candidate as a gate material for future nanoelectronic devices and technology.
- OSTI ID:
- 22413143
- Journal Information:
- Journal of Applied Physics, Vol. 117, Issue 7; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
Similar Records
Si and SiGe based double top gated accumulation mode single electron transistors for quantum bits.
Challenges in Nanoelectronics - Gate Dielectrics and Device Modeling (invited)