Graphics processor unit with opportunistic inter-path reconvergence
A graphics processing unit and methods for comping and executing instructions with opportunistic inter-path reconvergence are provided. A graphics processing unit may access computer executable instructions mapped to code blocks of a control flow for a warp. The code blocks may include an immediate dominator block and an intermediate post dominator block. The graphics processing unit may store a first thread mask associated with the first code block. The first thread mask may include a plurality of bits indicative of the active or non-active status for the threads of the warp, respectively. The graphics processing unit may a second thread mask corresponding to an intermediate code block between the immediate dominator block and intermediate post dominator block. The graphics processing unit may execute, with threads indicated as active by the first thread mask, instructions of the intermediate code block with a first operand or a second operand depending on the second thread mask.
- Research Organization:
- Purdue Univ., West Lafayette, IN (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- SC0010295
- Assignee:
- Purdue Research Foundation (West Lafayette, IN)
- Patent Number(s):
- 11,726,785
- Application Number:
- 17/491,057
- OSTI ID:
- 2222121
- Resource Relation:
- Patent File Date: 09/30/2021
- Country of Publication:
- United States
- Language:
- English
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