Scalability of Shor's algorithm with a limited set of rotation gates

Journal Article · Wed Sep 01 04:00:00 EDT 2004 · Physical Review. A

DOI:https://doi.org/10.1103/PhysRevA.70.032329· OSTI ID:20646034

Fowler, Austin G; Hollenberg, Lloyd C.L. ^[1]

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1. Centre for Quantum Computer Technology, School of Physics, University of Melbourne, Victoria 3010 (Australia)

Typical circuit implementations of Shor's algorithm involve controlled rotation gates of magnitude {pi}/2{sup 2L} where L is the binary length of the integer N to be factored. Such gates cannot be implemented exactly using existing fault-tolerant techniques. Approximating a given controlled {pi}/2{sup d} rotation gate to within {delta}=O(1/2{sup d}) currently requires both a number of qubits and a number of fault-tolerant gates that grows polynomially with d. In this paper we show that this additional growth in space and time complexity would severely limit the applicability of Shor's algorithm to large integers. Consequently, we study in detail the effect of using only controlled rotation gates with d less than or equal to some d{sub max}. It is found that integers up to length L{sub max}=O(4{sub max}{sup d}) can be factored without significant performance penalty implying that the cumbersome techniques of fault-tolerant computation only need to be used to create controlled rotation gates of magnitude {pi}/64 if integers thousands of bits long are desired factored. Explicit fault-tolerant constructions of such gates are also discussed.

• OSTI ID: 20646034
• Journal Information: Physical Review. A, Journal Name: Physical Review. A Journal Issue: 3 Vol. 70; ISSN 1050-2947; ISSN PLRAAN
• Country of Publication: United States
• Language: English

Related Subjects

74 ATOMIC AND MOLECULAR PHYSICS
ALGORITHMS
GATING CIRCUITS
IMPLEMENTATION
LENGTH
PERFORMANCE
QUANTUM MECHANICS
ROTATION