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Stressmigration studies on dual damascene Cu/oxide and Cu/low k interconnects

Journal Article · · AIP Conference Proceedings
DOI:https://doi.org/10.1063/1.1845856· OSTI ID:20630480
;  [1]; ; ; ;  [2]
  1. Microelectronics Research Center, the University of Texas at Austin, Austin, TX 78712 (United States)
  2. System IC R and D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725 (Korea, Republic of)

Stress-induced void formation (SIV) was studied in dual damascene Cu/oxide and Cu/low k interconnects over a temperature range of 140 {approx} 350 deg. C. Two modes of stressmigration were observed depending on the baking temperature and sample geometry. At lower temperatures (T < 290 deg. C), voids were formed under the periphery of via connecting to narrow lines. This mode of stressmigration showed a typical behavior of stressmigration with peak damage at 240 deg. C, and activation energy (Q) of 0.75 eV for Cu/oxide interconnects. At a higher temperature range (T > 290 deg. C), voids were found in via bottoms which were connected to wide lines. The rate of high temperature stressmigration increased exponentially with temperature up to 350 deg. C, which was the temperature limit of the test system, and did not show a peak at an intermediate temperature. The activation energy was 1.0 eV for Cu/oxide, 0.86 eV for Cu/OSG, and {approx}1.0 eV for Cu/FSG interconnects. The dependence of stressmigration on linewidth, sample geometry, and ILD material was presented in this paper.

OSTI ID:
20630480
Journal Information:
AIP Conference Proceedings, Journal Name: AIP Conference Proceedings Journal Issue: 1 Vol. 741; ISSN APCPCS; ISSN 0094-243X
Country of Publication:
United States
Language:
English

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